Switched capacitor circuits, including configurations such as switched capacitor gain cells, integrators, doublers, and filters have long been recognized as one of the best ways to implement high accuracy analog circuits without the silicon die area and inaccuracies that can result from relying on on-chip passive components such as resistors. Switched capacitor circuits operate by controlling charge transfer between capacitors. Generally, charge is transferred between scaled capacitors with semiconductor switches that are switched at a frequency that effectively controls the rate of charge transfer, or current, in place of less accurate and much larger resistors that would otherwise be used.
FIG. 1 is a schematic of a conventional switched capacitor inverting gain circuit 10. Operation of the switched capacitor inverting gain circuit 10 is as follows: i) With switch 1 and switch 3 closed capacitor C1 is charged to the input voltage Vin; ii) switch 1 and switch 3 open, and switch 2 and switch 4 close; iii) In order to maintain the same voltage at the inverting terminal (−) as the non-inverting terminal (+) of the operational amplifier (opamp) 12, the opamp 12 supplies a current I to produce a charge equal and opposite to the previously stored charge on C1 (Vin*C1), where the current I has to flow through C2, which then charges C2 to a voltage of −(C2/C1)*Vin, and producing that voltage on the output (Vout) since the inverting terminal is held by the opamp 12 at ground.
FIG. 2 shows an alternate implementation of a conventional switched capacitor circuit 20. In FIG. 2, the opamp 12 of FIG. 1 is replaced by a current source 22 and a comparator 24. Activation of the switch 26 to voltage vp simply ensures that voltage vx is pulled below the reference voltage of the comparator during each cycle (ie., vp must be less than the reference). The operation is similar to the previous example: i) switch 1 and switch 3 close charging C1 to Vin; ii) switch 1 and switch 3 open and switch 2 and switch 4 close; iii) with switch 2 and switch 4 closed, switch 26 turns on followed by the current source 22, then switch 26 turns off. In this case the current source 22 will supply a current the same way that the opamp 12 of FIG. 1 did. Except, in this case the comparator 24 detects that voltage vx has reached ground, and disables the current source 22 once voltage vx reaches ground. Thus at the end of the charging period, the nodes are at the same potential as they were in the opamp case of FIG. 1, but the complexity of the opamp, including its loop response, offset, current demand and other non-idealities are replaced with a simple open source comparator 24 and current source 22 combination. The node vx will not reach ground until the charge previously stored on C1 (Vin*C1) is cancelled by exactly the same negative charge. The current which creates this charge must flow through C2 to reach C1 and therefore C2 will charge up to −(C2/C1)*Vin.
As shown in FIG. 2, the capacitor ratio (C1/C2) controls the voltage gain, and it is common to scale capacitors so as to control voltage according to the ratio of charge transfer (Q) in various switched capacitor circuits as Q=CV (if capacitance C changes so will voltage V for a given charge Q). For example, in FIG. 3 the opamp and comparator/current source based switched capacitor circuits use unit capacitors which may be switched into and out of the circuit to control the voltage gain as described above. This type of circuit is commonly seen in data converters, filters, programmable gain circuits and other critical precision analog applications.
However, the reliance upon unit capacitors for matching or programmability requires careful attention to the capacitor layout and also requires a lot of silicon area. For example, dummy capacitors, routing, matching techniques, and other measures are required to combat parasitics and the problems grow as the number of unit capacitors grows limiting the dynamic range of programmability. Unit capacitor matching often requires complex layout analysis and parasitic extract, and often re-spins of silicon. Furthermore, as additional switches and wires are utilized parasitic capacitances change causing errors in the circuit such as charge injection mis-match. In the opamp circuit of FIG. 1 it is not possible to scale the currents to the two capacitors (C1, C2). Also, as the input voltage must be fully loaded across C1, it is not possible to control the charge on C1 without complex voltage to current converters, which would degrade the accuracy of the switched capacitor circuits and make them undesirable for use.
It would therefore be desirable to produce a switched capacitor circuit which may be dynamically scaled without having to rely on unit passives, such as unit capacitors, and the complexities of switching these capacitors into and out of circuit. It would be further desirable if the current provided, and thus the charge transferred could be controlled at a nodal level, such that selected capacitors within a switched capacitor circuit may see scaled currents, and the current rather than the capacitors could be scaled. As relative current accuracy is much easier to achieve using current mirrors than laying out switched capacitors arrays is, the result would therefore be more accurate in addition to simplifying the solution and saving silicon area.